1. Field of the Invention
The present invention relates to a reference voltage supply circuit, and more particularly to a reference voltage supply circuit generating a dynamic voltage, which functions to supply electric charge to a capacitive load connected with the reference voltage supply circuit or remove charge stored in the capacitive load, to remove a glitch caused by movement of charge.
2. Discussion of Related Art
With the development of imaging technology, an amplifier circuit used in an image sensor (e.g., a complementary metal oxide semiconductor (CMOS) image sensor) has been actively developed lately. A switched-capacitor (SC) circuit used in a programmable gain amplifier (PGA) circuit is currently attracting attention among the developed amplifier circuits.
A general SC circuit performs a sample and hold (S/H) operation, an amplification/attenuation operation, a multiplying digital-to-analog converter (MDAC) operation, a filtering operation, etc. as a switch connected to a capacitor is driven by a clock, and so on. In this process, a reference voltage is connected to one or both of two plates constituting the capacitor through a switch. The reference voltage is supplied from a reference voltage supply circuit that stably supplies a constant voltage to a target circuit regardless of an environmental change. Such a reference voltage supply circuit is essential in driving an analog circuit such as an analog-digital converter (ADC), a phase-locked loop (PLL), and a filter circuit. The power consumption of the reference voltage supply circuit is about one fifth to half the power consumption of the overall analog circuit, which is too large to be ignored. In particular, when an SC circuit is used in a high-resolution image sensor, large current is required to satisfy the corresponding resolution. In this case, power consumed by the reference voltage supply circuit may exceed half the power consumption of the overall analog circuit.
FIGS. 1A to 1C are circuit diagrams of general reference voltage supply circuits.
A reference voltage supply circuit may be a circuit generating differential reference voltages VREFP and VREFN as shown in FIG. 1A. Such a circuit for generating the differential reference voltages VREFP and VREFN is frequently used to supply a reference voltage to an ADC. Meanwhile, a reference voltage supply circuit may be a circuit generating one reference voltage VREF as a form used in a circuit requiring a common mode voltage. To be specific, a reference voltage supply circuit may generate a constant reference voltage VREF by adjusting the values of resistors R1 and R2 as shown in FIG. 1B, or may generate a constant reference voltage VREF by applying a feedback to an amplifier as shown in FIG. 1C.
FIG. 2A is a circuit diagram of the reference voltage supply circuit of a pipeline ADC shown in FIG. 1A to which a capacitor array CA is connected.
As shown in FIG. 2A, in the reference voltage supply circuit, a feedback with a gain of 1 is applied to a two-stage amplifier circuit including two amplifiers A1 and A2 and two transistors A1 and A2. A resistor R may be connected between the two amplifiers A1 and A2, so that the two amplifiers A1 and A2 can be correlated with each other.
When voltages REF+ and REF− are input to the two amplifiers A1 and A2, differential reference voltages VREFP and VREFN having the same level are generated with the resistor R interposed between the differential reference voltages VREFP and VREFN, and static current generated according to a difference between the two voltages VREFP and VREFN and the resistance value of the resistor R flows.
FIG. 2B is a time table illustrating operation of a clock driving a switch SW between the reference voltage supply circuit and the capacitor array CA of FIG. 2A.
When a clock Q2 is in its on-state, the switch SW between the capacitor array CA and the reference voltage supply circuit is turned off, and the capacitor array CA and the reference voltage supply circuit do not influence each other. On the other hand, as soon as a clock Q1 is switched to its on-state, the reference voltages VREFP and VREFN are connected to the lower plates of respective capacitors in the capacitor array CA. When the clock Q2 is switched to its on-state, the reference voltage supply circuit and the capacitor array CA are separated again, and thus the lower plates of the capacitors need to be fixed at the reference voltage VREFP or VREFN for the corresponding time. To this end, additional charge needs to be supplied to the capacitors, or a part of charge stored in the capacitors needs to be removed. During this process, a glitch momentarily occurs in the reference voltages VREFP and VREFN. In a general ADC, charge needs to be supplied to a capacitor when a plate of the capacitor array CA is fixed at the reference voltage VREFP, and charge previously stored in the capacitor needs to be removed when the plate of the capacitor array CA is fixed at the reference voltage VREFN. Thus, the direction of the glitch is a (−) direction in the former case, and a (+) direction in the latter case. Meanwhile, the magnitude of a glitch is proportional to the capacitance of a load capacitor and inversely proportional to the current flowing through the resistor R. Thus, when the capacitance of the load capacitor is large in comparison with the voltage driving capability of the reference voltage supply circuit or the voltage driving capability of the reference voltage supply circuit is not sufficient, a large glitch occurs. Then, the settling time of a reference voltage lengthens, and a malfunction may occur.
To solve this problem, the voltage driving capability of the reference voltage supply circuit may be improved. However, in this case, static current continuously flowing regardless of a clock increases, and thus the power consumption of an overall circuit increases. In particular, an SC circuit used in a high-speed high-resolution image sensor requiring large static current leads to a significant increase in power consumption.
Consequently, it is urgently necessary to develop technology for removing a glitch caused by static current in a reference voltage supply circuit.